AMD made headlines by announcing that it has successfully developed its first 2nm-class silicon, specifically a core complex die (CCD) for its upcoming 6th Generation EPYC ‘Venice’ processor, which is anticipated for launch in 2026. This CCD represents a significant milestone as it is the first high-performance computing (HPC) CPU design manufactured using TSMC’s advanced N2 process technology.
Details on EPYC ‘Venice’ Processors
The 6th Generation EPYC ‘Venice’ is expected to leverage AMD’s Zen 6 microarchitecture. The CCDs, fabricated on TSMC’s 2nm-node process, are set to enhance performance and efficiency significantly. AMD’s swift progress in obtaining the first Venice CCDs reflects the company’s longstanding partnership with TSMC, underscoring their collaborative efforts in harnessing cutting-edge manufacturing technology.
Validation and Testing
While AMD has yet to disclose comprehensive details about the EPYC ‘Venice’ processors or their CCDs, the company confirmed that the silicon has been successfully powered on and has passed preliminary functional testing. This demonstrates the maturity of the product development as AMD moves towards mass production.
Performance Enhancements with TSMC’s N2 Technology
TSMC’s N2 process utilizes gate-all-around (GAA) nanosheet transistors, promising substantial improvements in power consumption and performance. Expected benefits include a reduction in power usage by 24% to 35% or a 15% performance boost at constant voltage, as well as a 1.15x increase in transistor density compared to the previous N3 generation. These advancements are attributed to the innovative transistor design paired with the N2 NanoFlex co-optimization framework.
AMD’s Strategic Positioning
This announcement comes amidst Intel’s delay of its next-generation Xeon ‘Clearwater Forest’ processor, which is based on its 18A manufacturing technology intended to rival TSMC’s N2. Additionally, AMD revealed that it has validated the silicon for its 5th Generation EPYC processors produced at TSMC’s Fab 21 in Arizona, enabling domestic production of some current-generation CPUs.
Collaborative Vision for the Future
Dr. Lisa Su, AMD’s CEO, emphasized the crucial role of TSMC in their innovative processes, stating that their cooperation has been essential in delivering leading-edge products in HPC. Furthermore, Dr. C.C. Wei, TSMC’s CEO, reiterated the importance of this partnership in achieving technological advancements that drive improved performance and efficiency in high-performance silicon.